Micron details memory roadmap: 3D DRAM, High-NA EUV and custom silicon

Why it matters

Micron laid out its memory production plans for the coming years. As AI systems demand more memory and storage, this roadmap directly affects the speed and cost of AI hardware.

The DRAM side

Unlike rivals CXMT, Samsung and SK hynix, Micron decided to abandon plans to produce DRAM with 4F2 memory cells, citing the lack of a viable scaling path beyond that point. Instead, it is focusing on wafer bonding, High-NA EUV lithography, new materials and eventually 3D DRAM.

The next-generation 1δ (1-delta) process is expected to enter mass production in the second half of 2027. Micron expects it to raise bit density by mid-20% compared with 1γ. The node will be manufactured in the U.S. and used for next-generation DDR, LPDDR, graphics memory, HBM5, vertical HBM (vHBM) and vertical Edge Inference Memory (vEIM) products.

The subsequent 1ε process will rely on wafer bonding, letting Micron build different structures on separate wafers and bond them together. The ζÅ node will bring High-NA EUV lithography to memory manufacturing and is in early development; Micron has not disclosed a production schedule, density gains or how many layers will need High-NA.

NAND and custom silicon

On the NAND side, the company is focused on new materials that densify the cell architecture and on continued XYZ scaling. The most revealing part of the roadmap is the expansion of custom DRAM and NAND products, as AI developers increasingly want memory optimized for their own processor architectures and workloads.